1. | 8 simultaneously sampling 16-bit, 25 MSPS A/Ds |
2. | Programmable input: +/-2V, +/-1V, +/-0.4V, +/-0.1V |
3. | High impedance, differential inputs |
4. | Xilinx Spartan3A DSP, 1.8/3.4M gate FPGA |
5. | 4MB SRAM |
6. | Programmable Low Jitter PLL timebase |
7. | Framed, software or external triggering |
8. | Log acquisition timing and events |
9. | 44 bits digital IO on P16 |
10. | Power Management features |
11. | XMC Module (75x150 mm) |
12. | PCI Express (VITA 42.3) |
X3-10M Spartan 3 FPGA XMC module |