Belangrijkste Eigenschappen
| 1. | 3U OpenVPX FPGA coprocessor card |
| 2. | FMC I/O site (VITA 57) with 8 x 5 Gbps MGT lanes, 80 LVDS pairs (LA, HA, HB full support) |
| 3. | FPGA Computing Core: |
| 4. | - Xilinx Virtex6 SX315T, SX475T, LX240T or LX550T |
| 5. | - 2 Banks of 1GB DRAM (2GB total) |
| 6. | - 2 banks of 9MB QDRII+ SRAM (18MB total) |
| 7. | - 128MB DDR3 DRAM |
| 8. | VPXI system-timing features |
| 9. | -Integrates with VPXI backplane timing |
| 10. | -VPX backplane timing clock and trigger |
| 11. | -VPX backplane shared triggers and flags |
| 12. | -PLL with 10-1000 MHz range with 10 MHz |
| 13. | -0.5 ppm reference or VPX timing clock |
| 14. | System communications |
| 15. | -x12 lanes, 5 Gbps |
| 16. | -Dual PCIe or up to four Aurora ports |
| 17. | -PCIe x8 Gen2 PCIe supports 2 GB/s sustained transfer rates |
| 18. | < 15W typical excluding FMC |
| 19. | Ruggedization Levels up to L4 forced air or conduction cooling |
| 20. | 40g shock, 9g sine, 0.1 g2/Hz random vibe |
| 21. | IPMI health monitoring |
Producten
VPX6-COP |
